Burst EPROM architecture

Details Burst EPROM architecture Burst EPROM architecture

1989-12-28

1992-10-27

Fleming, Michael R.

Boots, shoes, and leggings

364DIG1, 3642391, 364DIG2, 3649775, G06F 1328

Patent

active

051596725

ABSTRACT:
Circuitry which when combined with an EPROM in a single integrated circuit for connection to a microprocessor which provides suitable signals utilized by the additional circuitry to provude faster access to the code or data stored in the EPROM than can be accomplished without such additional circuitry by providing zero wait state burst performance. A state machine is utilized to manage the interface between the microprocessor and the burst EPROM.

REFERENCES:
patent: 4912630 (1990-03-01), Cochroft, Jr.
patent: 5058005 (1991-10-01), Culley

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