Static information storage and retrieval – Floating gate – Particular biasing
Patent
1981-11-25
1983-08-30
Fears, Terrell W.
Static information storage and retrieval
Floating gate
Particular biasing
365189, 357 23, G11C 1140
Patent
active
044020643
ABSTRACT:
A nonvolatile memory, especially an electrically erasable and programmable read only memory (EE-PROM) includes an array of memory cells. In each of the memory cells four transistors are formed, that is a read transistor and a first selecting transistor connected in series, and a write-erase transistor and a second selecting transistor connected in series. The write-erase transistor has a floating gate partially provided with a thin insulation layer thereunder. The read transistor also has a floating gate provided with a thick insulation layer thereunder. The first and second selecting transistors are turned to ON or OFF together.
REFERENCES:
patent: 4330850 (1982-05-01), Jacobs et al.
Fears Terrell W.
Fujitsu Limited
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