Structure and method for preventing latch-up in integrated circu

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307362, 307296R, 357 42, H03K 19003

Patent

active

051592045

ABSTRACT:
A circuit and method for avoiding latch up in an integrated circuit in which the base-emitter junction of a parasitic bipolar transistor forming part of a parasitic SCR structure is monitored. If the forward bias of the monitored base-emitter junction approaches a predetermined value, the operation of the circuit is altered to prevent activation of the SCR.

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patent: 4571505 (1986-02-01), Eaton, Jr.
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patent: 4647956 (1987-03-01), Shrivastava et al.
patent: 4670668 (1987-06-01), Liu
patent: 4723081 (1988-02-01), Akatsuka

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