Fishing – trapping – and vermin destroying
Patent
1988-10-04
1989-08-08
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 57, 437 34, 148DIG9, 357 43, 357 59, H01L 2172
Patent
active
048552453
ABSTRACT:
An integrated circuit containing bipolar and complementary MOS transistors wherein the emitter terminals of the bipolar transistors as well as the gate electrodes of the MOS transistors are composed of the same material, consisting of a metal silicide or of a double layer containing a metal silicide and a polysilicon layer. The emitter base terminals are arranged in self-adjusting fashion relative to one another and the collector is formed as a buried zone. The collector terminal is annularly disposed about the transistor. As a result of the alignment in dependent spacing between the emitter and the base contact, the base series resistance is kept low and a reduction of the space requirement is achieved. The doping of the bipolar emitter and of the n-channel source/drain occurs independently. The method for the manufacture of the integrated circuit employs an n-doped gate material of the MOS transistors as a diffusion source and as a terminal for the emitters of the bipolar transistors and does not require an additional photolithography step. Because of the annular, deep collector region, a reduction of the collector series resistance and an increased latch-up hardness are achieved. The integrated semiconductor circuit is employed in VLSI circuits having high switching speeds.
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Neppl Franz
Winnerl Josef
Hearn Brian E.
Nguyen Tuan
Siemens Aktiengesellschaft
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