System for flushing instruction-cache only when instruction-cach

Details System for flushing instruction-cache only when instruction-cach System for flushing instruction-cache only when instruction-cach

1990-06-21

1993-05-25

Lee, Thomas C.

Boots, shoes, and leggings

364DIG1, 3642434, 36424341, 3642555, 3642592, 3642632, G06F 9312, G06F 9445, G06F 1300

Patent

active

052147703

ABSTRACT:
A method and apparatus for optimizing the performance of a multiple cache system computer having separate caches for data and instructions in which all writes to the data cache are monitored. If the address tag of the item being written matches one of a list of tags representing valid instructions currently stored in the instruction cache, a flag called I.sub.-- FLUSH.sub.-- ON.sub.-- REI is set. Until this flag is set, REI (Return from Exception or Interrupt) instructions will not flush the instruction cache. When the flag is set, an REI command will also flush or clear the instruction cache. Thus, the instruction cache is only flushed when an address referenced by an instruction is modified, so as to reduce the number of times the cache is flushed and optimize the computer's speed of operation.

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