Cryptography – Communication system using cryptography – Time segment interchange
Patent
1992-01-07
1993-05-25
Swann, Tod R.
Cryptography
Communication system using cryptography
Time segment interchange
380 28, 380 42, H04K 104
Patent
active
052147037
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention is directed to a device for the block-by-block conversion of a first digital block into a second digital block using at least one freely selectable control block, each of the blocks having an equal number of digits.
2. Description of the Related Art
Transmission networks using the Data Encryption Standard DES have been in use throughout the world for more than ten years. This DES standard of the American National Bureau of Standards (NBS) is used for block encryption with individually selectable keys (secret key block encryption). Every plaintext block has a length of 64 bits, as does the ciphertext block. A sequence of 64 bits, 56 of which can be freely selected, serves as key (secret key). The transmission of the ciphertext block is effected via a public network.
In general, the Data Encryption Standard DES is a very good encryption tool. However, it is an open, debatable question whether or not the DES Standard has failed to remain secure in the meantime. The small length of the secret key plays an important role in this.
SUMMARY OF THE INVENTION
It is the object of the invention to provide a new kind of block encryption which is improved over the DES and which could be introduced as a European Standard. This kind of block encryption will make use of all known encryption techniques of confusion, diffusion, etc. and, above all, will use a longer key providing first input means for receiving at least two initial subblocks, wherein the initial digital block is subdivided to form the initial subblocks. Each of the initial subblocks have m digits. A second input means is provided for receiving at least two control blocks, each control block also having m digits. Logic means perform serial operations of at least two different types upon the initial subblocks and the control blocks. The logic means include at least four operation units, each having first and second inputs for receiving blocks to be operated upon and an output for sending an output block resulting from the logical operation performed. The blocks operated upon and the output block each have m digits. The blocks operated upon by the operation units include the initial subblocks, the control blocks, and the output blocks.
The majority of the operation units are arranged so that the operation unit which operates upon the output block of a previous operation unit performs an operation different from that of the previous operation unit. The operation units perform the operations selected from and and . Output means are provided for transmitting at least two final subblocks, the final subblocks forming the assigned final digital block, wherein the final subblocks are converted blocks which correspond to the initial subblocks.
BRIEF DESCRIPTION OF THE DRAWINGS
The invention is described in more detail in the following by way of example with reference to fourteen diagrams:
FIG. 1 shows a basic block wiring diagram of a device for the transmission of data in encrypted form;
FIG. 2 shows a block wiring diagram of an encrypter;
FIG. 3 shows a block wiring diagram of a primary encryption logic;
FIG. 4 shows a truth table of operation units of a first kind;
FIG. 5 shows a truth table of operation units of a second kind;
FIG. 6 shows a block wiring diagram of an extended encryption logic;
FIG. 7 shows a truth table of operation units of a third kind;
FIG. 8 shows a block wiring diagram of a supplementary encryption logic;
FIG. 9 shows a block wiring diagram of an encryption stage;
FIG. 10 shows a table of key subblocks and decryption subblocks;
FIG. 11 shows a block wiring diagram of a second supplementary encryption logic;
FIG. 12 shows a block wiring diagram of a second encryption stage;
FIG. 13 shows a block wiring diagram of a second encrypter;
FIG. 14 shows a second table of key subblocks and decryption subblocks.
DESCRIPTION OF THE PREFERRED EMBODIMENTS
FIG. 1 shows a basic block wiring diagram of a device for the transmission of data in encrypted form. The data (plaintext X)
REFERENCES:
patent: 4275265 (1981-06-01), Davida et al.
patent: 4668103 (1987-05-01), Wilson
patent: 4850019 (1989-07-01), Shimizu et al.
patent: 5020106 (1991-05-01), Robold et al.
Lai Xuejia
Massey James L.
ASCOM Tech AG
Swann Tod R.
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