Method of making high voltage semiconductor device

Details Method of making high voltage semiconductor device Method of making high voltage semiconductor device

1990-09-17

1993-05-25

Fourson, George

Fishing, trapping, and vermin destroying

437 67, H01L 2176

Patent

active

052139948

ABSTRACT:
An improved method and structure for high voltage semiconductor devices capable of blocking voltages of the order of 1000 volts and greater is described. In a preferred embodiment, a blanket P layer is formed in an N.sup.- epi-layer on an N.sup.+ substrate. An annular groove is etched through the blanket P layer into the N.sup.- epi-layer. The bottom of the groove is doped N.sup.+ using the same mask as for the first groove etch. A second groove is formed inside of and partly overlapping the first groove and extending to a greater depth than the first groove, but not through the epi-layer. The second groove is filled with passivating material, metal electrodes are applied to the P.sup.+ region and the N.sup.+ substrate, and the devices separated at the N.sup.+ region lying outside the second groove in the bottom of the first groove. Excellent high voltage blocking characteristics are obtained with the same or fewer process steps and better yield.

REFERENCES:
patent: 4140558 (1979-02-01), Murphy et al.
patent: 4520552 (1985-06-01), Arnould et al.
patent: 4711013 (1987-12-01), Cammert

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