Distributed branch logic system and method for a geometry accele

Details Distributed branch logic system and method for a geometry accele Distributed branch logic system and method for a geometry accele

1997-04-30

1999-07-27

An, Meng-Ai T.

395378, 395387, 395567, 395571, 3958001, 39580011, 39580037, G06F 1300

Patent

active

059305193

ABSTRACT:
A system and method for minimizing space requirements and increasing speed in a geometry accelerator for a computer graphics system by enabling efficient multiway logic branching functionality. Architecturally, the system is implemented as follows. A plurality of processing elements (stack) are disposed in the geometry accelerator along with a plurality of control units that are implemented in a read-only memory (ROM) via microcode. Each of the control units is configured to drive a processing element in order to modify image data. A next address field is associated with each of the microcode instructions and defines a location in the ROM of a next instruction to be executed. A branch logic unit including a plurality of control unit logic elements. The plurality of control unit logic elements correspond respectively with the control units and are configured to assist with internal instruction branching within their respective control units. Each of the control unit logic elements is configured to evaluate and define the next address field for a currently executing instruction associated with a corresponding ROM-based control unit based upon state data received from the stack and the corresponding ROM-based control unit.

REFERENCES:
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patent: 5097411 (1992-03-01), Doyle et al.
patent: 5517611 (1996-05-01), Deering
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patent: 5710879 (1998-01-01), Ashburn
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"Pyramid 3D", geometry processor, manufactured by TriTech Microelectronics International. See Internet Web page at URL: http//www.bergsoe.dtu.dk/.about.pbk2707/gfxcard/pyramid3d/architec.htm espec. reference to geometry processor calculations being based on microcode.

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