Dual port memory device with tag bit marking

Details Dual port memory device with tag bit marking Dual port memory device with tag bit marking

1989-11-13

1990-12-04

Hecker, Stuart N.

Static information storage and retrieval

Associative memories

Ferroelectric cell

36523005, 36518907, 364200, G11C 700

Patent

active

049758721

ABSTRACT:
A memory device comprises an address input, first decoder for decoding an address input applied to the address input means, two-port data storage for storing data, a tag field provided for each of word areas of the data storage means, means for reading data through the first port of the data storage means, data input/output means for writing in and reading out data through the second port of the data storage means, selecting means for selecting data read out through the first port of the data storage means or data externally inputted through the data input/output means, second decoding means for decoding an output data from the selecting means into an address, and control means for controlling reading out of data through the first port of the data storage means, controlling writing in and reading out of data through the second port of the data storage means, and operating in synchronism with an externally supplied clock signal for controlling marking in the tag fields selected sequentially according to address data inputted from the outside through the data input/output means.

REFERENCES:
patent: 4833651 (1989-05-01), Seltzer et al.
patent: 4860263 (1989-08-01), Mattausch
patent: 4891788 (1990-01-01), Kreifels
Knuth, D. E.: "The Art of Computer Programming", vol. 1, Fundamental Algorithms, Addison-Wesley, 1973 (pp. 406-420).

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