Floating-point processor having pre-adjusted exponent bias for m

Details Floating-point processor having pre-adjusted exponent bias for m Floating-point processor having pre-adjusted exponent bias for m

1989-04-17

1990-12-04

Shaw, Dale M.

Boots, shoes, and leggings

G06F 738

Patent

active

049758683

ABSTRACT:
A floating-point arithmetic unit includes an exponent unit for biased exponents. Combinatorial bias-adjust logic removes the bias from one operand exponent before the two operand exponents are added together in adder for a multiply operation, and inserts a bias into one exponent before the exponents are subtracted by the adder for a divide operation.

REFERENCES:
patent: 4366548 (1982-12-01), Kregness et al.
patent: 4528640 (1985-07-01), Criswell
patent: 4823260 (1989-04-01), Imel et al.

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