Multiprocessor system which only allows alternately accessing to

Details Multiprocessor system which only allows alternately accessing to Multiprocessor system which only allows alternately accessing to

1989-11-08

1990-12-04

Lee, Thomas C.

Boots, shoes, and leggings

3642281, 36424291, 3642283, 3642426, 364134, G06F 1318, G06F 1516

Patent

active

049758330

ABSTRACT:
In a multiprocessor system, wherein each local group a processor its local memory are included, and the local memory is accessed from a processor either in a same group or another group through a communication media. The system according to the present invention is provided with a LOCK flag, a SYNC flag and a control circuit for controlling accesse to the local memory by a processor of the same group and a processor of the other group depending on the status of the flags. The LOCK flag inhibits reading from the memory by the other processor while the same group processor is writing therein. The SYNC flag permits reading of the memory by the other processor and inhibits the same group processor from writing therein. A read request as well as a write request to the memory from both processors are input to the control circuit which controls conveyance of the requests to the memory. Thus, the flag setting/resetting is carried out within a group, therefore, synchronization software which requires much overhead, or control lines which interconnect the processors are not necessary, resulting in accomplishment of a reduced network traffic, that is, a high-speed multiprocessor operation.

REFERENCES:
patent: 4121285 (1978-10-01), Chen
patent: 4453214 (1984-06-01), Adcock
patent: 4470109 (1984-09-01), McNally
patent: 4574350 (1986-03-01), Starr
patent: 4620278 (1986-10-01), Elsworth et al.
patent: 4621318 (1986-11-01), Maeda
patent: 4764865 (1988-08-01), Temple, III

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