Automatic memory module address assignment system for available

Details Automatic memory module address assignment system for available Automatic memory module address assignment system for available

1981-06-29

1984-08-28

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1306, G11C 506, G11C 700

Patent

active

044687290

ABSTRACT:
An automatic Memory Module sensing and Memory Module address assignment system during an initializing sequence is described. Each Memory Module has a memory assignment register associated therewith, and all memory assignment registers are initialized to an illegal Memory Module address. The interlock and switch signals are sequentially evaluated under control of a scan counter and decoder. A memory assignment counter is utilized to develop sequential Memory Module addresses and is advanced for each Memory Module found to exist in the system. The memory assignment register for the Memory Module under consideration is set to the address specified in the memory assignment counter if the Memory Module is determined to be present, or is left storing the illegal code if the Memory Module being considered is not present in the system or is switched off. A memory capacity counter is advanced for each Memory Module found to exist in the system, and upon completion of the initializing sequence, provides signals indicative of the total Memory Module capacity of the system. In the event no memory is available, a signal indicating that status is provided to the data processing system. Upon completion of the evaluation of all Memory Modules in the system, the automatic memory assignment sequence is terminated and memory accessing can commence, with Memory Modules being accessed by comparison of applied Memory Module address signals to the contents of the memory assignment registers. Mode selection provides alternatively for assignment of Memory Module addresses sequentially for individual Memory Modules in the Normal Mode, or for pairs of Memory Modules in the Page Mode.

REFERENCES:
patent: 3742458 (1973-06-01), Inoue et al.
patent: 3803560 (1974-04-01), De Voy et al.
patent: 3805250 (1974-04-01), Rich
patent: 3805251 (1974-04-01), Morris et al.
patent: 3810109 (1974-05-01), Morris et al.
patent: 3812466 (1974-05-01), Rich
patent: 3839706 (1974-10-01), Borchsenius
patent: 3860908 (1975-01-01), Stratton
patent: 4025903 (1977-05-01), Kaufman et al.
patent: 4031517 (1977-06-01), Hirtle
patent: 4112502 (1978-09-01), Scheuneman
patent: 4183090 (1980-01-01), Furukawa et al.
patent: 4214304 (1980-07-01), Shimizu et al.

Affiliated with

Also associated with

Rating

Automatic memory module address assignment system for available does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Automatic memory module address assignment system for available , we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Automatic memory module address assignment system for available will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-880631