SOI type vertical channel field effect transistor and process of

Details SOI type vertical channel field effect transistor and process of SOI type vertical channel field effect transistor and process of

1991-11-21

1994-05-17

Wojciechowicz, Edward

Fishing, trapping, and vermin destroying

437 62, 437 66, 437 67, 437 69, 437 72, 437 79, 437 84, 437 43, 437913, 257330, 257333, 257347, 257353, H01L 2102, H01L 2968

Patent

active

053127820

ABSTRACT:
A thin film field effect transistor manufactured using a cladding technique wherein parasitic capacities of the source and drain with respect to the ground are low and a substrate biasing effect is low. The vertical channel field effect transistor comprises a substrate, an insulating layer formed on the substrate, and a semiconductor layer formed on the substrate in the insulating layer. The semiconductor layer has one of a source and a drain and an electrode for the one of the source and drain formed at a lower portion thereof while the other of the source and drain and another electrode for the other of the source and drain are formed at an upper portion of the semiconductor layer. The semiconductor layer further has a groove formed therein, and a gate electrode formed in the groove to fill up the same. Several processes of manufacturing such vertical channel field effect transistor are also disclosed.

REFERENCES:
patent: 4523963 (1985-06-01), Ohta et al.
patent: 5072269 (1991-12-01), Hieda

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