Process of fabricating MOS devices having shallow source and dra

Details Process of fabricating MOS devices having shallow source and dra Process of fabricating MOS devices having shallow source and dra

1985-12-24

1987-08-04

Roy, Upendra

Fishing, trapping, and vermin destroying

148DIG140, 357 65, 437 46, 437 24, H01L 21265, H01L 2978

Patent

active

046836454

ABSTRACT:
In a metal oxide semiconductor field effect transistor fabrication process, refractory metal is deposited over designated source and drain areas within a silicon substrate. Refractory metal and silicon at the interface is then mixed by ion implantation of a heavy neutral ion species such as germanium. To minimize source/drain junction depth, the source and drain locations can be subjected to bombardment by a lighter ion such as silicon which amorphizes silicon to a predetermined depth under the designated source and drain regions and so substantially confines dopant diffusion to the silicon amorphized region. To render the source and drain of desired conductivity type, an ion implantation of a non-neutral ion is then performed.

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