Memory selection in a multiple line adapter organization

Details Memory selection in a multiple line adapter organization Memory selection in a multiple line adapter organization

1984-09-10

1985-05-28

Thomas, James D.

Boots, shoes, and leggings

G06F 1516, G06F 1300, G06F 300

Patent

active

045204527

ABSTRACT:
A data-comm network uses multiple line adapters for controlling communication with various data terminals. Each line adapter, and also a data-link interface unit, has its own RAM memory means for buffering of data. An associated microprocessor permits selection of any particular line adapter and its RAM memory means or selection of the data-link-interface unit RAM memory means.

REFERENCES:
patent: 3842405 (1974-10-01), Key et al.
patent: 4016548 (1977-04-01), Law et al.
patent: 4093981 (1978-06-01), McAllister et al.
patent: 4156907 (1979-05-01), Rawlings et al.
patent: 4189769 (1980-02-01), Cook et al.
patent: 4205373 (1980-05-01), Shah et al.
patent: 4225919 (1980-09-01), Kyu et al.
patent: 4254462 (1981-03-01), Raymond et al.
patent: 4261033 (1981-04-01), Lemay et al.
patent: 4291372 (1981-09-01), Forbes et al.
patent: 4292667 (1981-09-01), Catiller et al.
patent: 4292669 (1981-09-01), Wollum et al.
patent: 4293909 (1981-10-01), Catiller et al.
patent: 4363093 (1982-12-01), Davis et al.
patent: 4385382 (1983-05-01), Goss et al.
patent: 4387425 (1983-06-01), El-Gohary
patent: 4388686 (1983-06-01), Haid

Affiliated with

Also associated with

Rating

Memory selection in a multiple line adapter organization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Memory selection in a multiple line adapter organization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Memory selection in a multiple line adapter organization will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-872262