Patent
1996-06-07
1999-01-05
An, Meng-Ai T.
395306, 395308, G06F 1300, G06F 1340
Patent
active
058570837
ABSTRACT:
A bus interface device for interfacing a secondary peripheral bus with a system having a host CPU and a primary peripheral bus. The bus interface enables "virtual integration" of multiple physically distinct peripheral devices so that the collection of devices can function as a single integrated unit. The "virtually integrated" devices can share resources such as a dedicated bus, memory space, and memory bandwidth just as if the devices were physically integrated. An intelligent device configuration process and a dynamic internal memory map allow each peripheral device to be independently added to the system, removed from the system, or upgraded just as if each device was a completely separate peripheral. In this way, flexibility and modularity are maintained while achieving the advantages and memory cost reductions associated with physically integrated devices. Additionally, the bus interface provides a dedicated secondary bus that enables multimedia and graphics bus traffic to be isolated from the CPU's primary peripheral bus. This separation allows the CPU's peripheral bus to provide sufficient bandwidth for all peripheral devices and allows room for the system to be upgraded with new or faster peripherals. The dedicated bus can also offer multimedia devices the higher bandwidth they require for applications such as 3-D graphics, digital audio, and motion video.
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An Meng-Ai T.
Dharia Rupal D.
Yamaha Corporation
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