Method and apparatus for parity block generation

Details Method and apparatus for parity block generation Method and apparatus for parity block generation

1996-08-13

1999-01-05

Chung, Phung M.

Excavating

371 48, G06F 1110

Patent

active

058569898

ABSTRACT:
An apparatus for generating parity blocks in a RAID system includes a PRAM control unit, two parity memories each coupled to the PRAM control unit, and in several alternative embodiments, a valid contents memory for tracking the contents of the parity memories. Parity blocks are generated by performing an exclusive OR operation between all of the corresponding data words in the data blocks of the stripe. Results of the exclusive OR operations are alternately stored in the two parity memories. Alternately dedicating one parity memory for storing the results of the exclusive OR operation which will be performed and one parity memory from which the results of the previous exclusive OR operation are loaded allows computation of the parity block to be performed at a higher rate than configurations which use a single parity memory. In a first embodiment of the PRAM control unit, a flip/flop tracks which of the two parity memories contains the valid contents. A second embodiment of the apparatus uses a valid contents memory and a top counter to support the generation of the parity block with fragmented in order transfers of data blocks in the stripe. The preferred embodiment of the apparatus for generating parity blocks allows generation of parity blocks while data block fragments are transferred over the bus without regard to order. The preferred embodiment employs a set of first access bits stored in the valid contents memory to indicate to which storage locations in the parity memories data words have previously been stored.

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