Distribution network switch for very large gigabit switching arc

Details Distribution network switch for very large gigabit switching arc Distribution network switch for very large gigabit switching arc

1997-05-15

1999-01-05

Olms, Douglas W.

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

370395, 370411, 370412, 370413, H04L 1228

Patent

active

058569774

ABSTRACT:
An inventive switch for transporting information cells without cell contention is described. The switch includes at least one parallel distribution network. Each distribution network includes an N.times.N first routing network for receiving cells at a plurality of input ports, where N equals the number the input ports. Illustratively, the routing network is self-routing and non-blocking, such as a Banyan Network. Connected to the N.times.N network are .rho..sup.k groups of shared buffers for storing the cells routed through the network for a period of time not greater than one cell cycle, where k is incremented from 1 to speed-up factor. In one aspect of this embodiment, the number of shared buffers is simply equal to N/.rho.. To prevent cell contention and cell loss, all of the contentious cells (cells destined for the same output during the same cycle) are stored in the same shared buffer. Connected to the shared buffers are .rho..sup.k groups of (N/.rho..sup.k).times.(N/.rho..sup.k) routing networks each having a plurality of output ports for outputting the cells, stored in the shared buffers, based on the destination addresses of each cell. Due in part to the utilization of .rho..sup.k groups of shared buffers, a large reduction in both hardware costs and chip real estate is realized. Specifically, a decrease in the number of switching stages is achieved.

REFERENCES:
patent: 5157654 (1992-10-01), Cisneros
patent: 5179552 (1993-01-01), Chao
patent: 5412646 (1995-05-01), Cyr et al.
patent: 5724352 (1998-03-01), Cloonan et al.

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