Interleaved shift register

Details Interleaved shift register Interleaved shift register

1993-04-28

1995-01-10

Wambach, Margaret Rose

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Multirank

377 75, 377 80, G11C 1900

Patent

active

053814550

ABSTRACT:
An interleaved shift register 20 includes a plurality of data storage elements 22a-22d having a common data input signal. Each of the plurality of data storage elements 22a-22d has an enable control input that is connected to one of a plurality of clock signals, each of the plurality of clock signals being incrementally out of phase with one another. Interleaved shift register 20 provides multiple data bits of the data signal to be stored within a single clock period of one of the plurality of clock signals, thus greatly improving the data rate without increasing the storage rate of the plurality of data storage elements 22a-22d.

REFERENCES:
patent: 4672647 (1987-06-01), Yamaguchi et al.
patent: 4903285 (1990-02-01), Knierim et al.
patent: 5150389 (1992-09-01), Kawasaki
patent: 5226063 (1993-07-01), Higashitsutsumi
Razak Hossain, Leszek D. Wronski and Alexander Albicki; Low Power Design Using Double Edge Triggered Flip-Flops; Publication: IEEE Transactions on Very Large Scale Integration (VLSI) Systems; vol. 2, No. 2, Jun. 1994; pp. 261-265.

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