Substrate structures for InP-based devices

Fishing – trapping – and vermin destroying

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357 30, 357 4, 357 61, 437132, H01L 29205, H01L 3106

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049639498

ABSTRACT:
A substrate structure for an InP-based semiconductor device having an InP based film is disclosed. The substrate structure includes a substrate region having a lightweight bulk substrate and an upper GaAs layer. An interconnecting region is disposed between the substrate region and the InP-based device. The interconnecting region includes a compositionally graded intermediate layer substantially lattice-matched at one end to the GaAs layer and substantially lattice-matched at the opposite end to the InP-based film. The interconnecting region further includes a dislocation mechanism disposed between the GaAs layer and the InP-based film in cooperation with the graded intermediate layer, the buffer mechanism blocking and inhibiting propagation of threading dislocations between the substrate region, and the InP-based device.

REFERENCES:
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Chen et al., Vacuum Tech. Research & Develop., pp. 61-66, 1988, "Combine . . . GaAs".
Razeghi et al., Appl. Phys. Lett., 52 (3), Jan. 18, 1988, pp. 209-211.
"High-Quality GaInAsP/ImP 200 Substrates".
IEEE Photovoltaics Specialists Conf., New Orleans, 1987, pp. 267-272, "High Efficiency . . . Si Substrates", Yamaguchi et al.
Yamaguchi et al., Solar Cells, "A New Approach . . . InP Solar Cells", 19, (1986-1987), pp. 85-96.
Seki et al., Jap. Jour. Appl. Phys., vol. 26, No. 10, Oct. 87, pp. L1587-L1589, "MOCVD Growth of InP . . . Layer".

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