Fishing – trapping – and vermin destroying
Patent
1994-03-21
1995-01-10
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437208, 437211, 437915, H01L 2160
Patent
active
053806816
ABSTRACT:
A process for fabricating a three-dimensional multi-chip array package wherein master semiconductor substrate is formed having a peripheral inner row of contact pads and a peripheral outer row of terminal pads. A plurality of subordinate semiconductor substrates are formed provided with a peripheral row of contact pads that match the contact pads on the master substrate. Openings are formed through centers of the contact pads that extend through the subordinate substrates. The subordinate substrates are stacked on the master substrate with the openings in alignment over the contact pads. The openings are then filled with a conductive material to interconnect the contact pads on all its substrates.
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Hearn Brian E.
Picardat Kevin M.
Saile George O.
Stoffel Wolmar J.
United Microelectronics Corporation
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