Self-aligned trenched contact (satc) process

Fishing – trapping – and vermin destroying

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437 41, 437200, 437228, 148DIG20, H01L 2144, H01L 2148

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active

053937040

ABSTRACT:
A method of forming a self-aligned trenched contact in the fabrication of an integrated circuit is described. Semiconductor device regions are formed in and on a semiconductor substrate wherein the semiconductor device regions include gate electrodes on the surface of the semiconductor substrate and source/drain regions within the semiconductor substrate. Spacers are formed on the sidewalls of the gate electrodes. A layer of silicon oxide is deposited over the surface of the substrate wherein the silicon oxide contacts the source/drain regions within the substrate between the gate electrodes. The substrate is covered with a layer of photoresist which is patterned to provide an opening over the planned self-aligned trenched contact between the gate electrodes. The silicon oxide is etched away to provide an opening to the silicon substrate using the patterned photoresist and the sidewall spacers as a mask. A trench is etched into the silicon substrate within the opening using the photoresist and the sidewall spacers as a mask to form the self-aligned trenched contact opening. A conducting layer is deposited within the trenched opening to complete the contact in the manufacture of the integrated circuit device.

REFERENCES:
patent: 4879254 (1989-11-01), Tsuzuki et al.
patent: 5208177 (1993-05-01), Lee
patent: 5225372 (1993-07-01), Savkar et al.
patent: 5244533 (1993-09-01), Kimura et al.
patent: 5272099 (1993-12-01), Chou et al.
patent: 5316977 (1994-05-01), Kunishima et al.

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