Vector processing apparatus allowing succeeding vector instructi

Details Vector processing apparatus allowing succeeding vector instructi Vector processing apparatus allowing succeeding vector instructi

1990-01-24

1991-12-17

Lee, Thomas C.

Boots, shoes, and leggings

364DIG1, 364736, 36423221, 3642629, 364230, G06F 1576, G06F 930

Patent

active

050739700

ABSTRACT:
A vector processing apparatus includes a vector processing unit having a vector instruction decoder and a scalar processing unit including a scalar instruction decoder for activating the vector processing unit in response to a scalar instruction commanding initiation of the processing of a vector instruction chain. The vector processing unit further includes an incidation register which is set in response to the initiation of decodiung of the vector instruction chain by the vector instruction decoder and reset in response to the decoding of an end vector instruction of the vector instruction chain. So long as the indication circuit is in the reset state, the vector processing unit is allowed to initiate the processing of a vector instruction chain under the command of the scaler processing unit.

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Russell, "The CRAY-1 Computer System," Communications of the ACM, vol. 21, No. 1, Jan. 1978.
Odaka et al., "Hitachi Supercomputer S-810 Array Processor System", Supercomputers, (1986).

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