Semiconductor device having buried element isolation region

Details Semiconductor device having buried element isolation region Semiconductor device having buried element isolation region

1990-07-26

1991-12-17

Mintel, William

357 71, 357 47, 357 2311, H01L 2712

Patent

active

050738135

ABSTRACT:
A MOS structure is formed on a silicon semiconductor substrate surface using a first gate electrode film made of polysilicon, an element isolation groove reaching the inside of the silicon semiconductor substrate is formed, and an insulating film is filled in the groove. In addition, a second gate electrode film made of a refractory metal such as molybdenum silicide is formed to be connected to the first gate electrode film, and the first and second gate electrode films are simultaneously removed to form a MOS gate electrode and a wiring layer.

REFERENCES:
patent: 4532696 (1985-08-01), Iwai
patent: 4740480 (1988-04-01), Ooka
patent: 4924284 (1990-05-01), Beyer et al.
patent: 4935800 (1990-06-01), Taguchi

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