Signal generator with synchronous mirror delay circuit

Details Signal generator with synchronous mirror delay circuit Signal generator with synchronous mirror delay circuit

1997-11-10

1999-09-21

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

327163, H03L 700

Patent

active

059559055

ABSTRACT:
A clock signal received from an external terminal through an input buffer is delayed by delay circuits. A counter circuit is started up in accordance with the clock signal transmitted through the delay circuits to count an oscillation pulse having a frequency which is sufficiently high with respect to that of the clock signal. Further, the counter circuit reversely counts the count in response to a clock signal delayed by one cycle, which has passed through the input buffer. When its count once again reaches the counter value at the start of counting, the counter circuit generates an output timing signal and transmits it to an internal circuit through a clock driver. A delay time outputted from the delay circuits is set to a delay time corresponding to the sum of a delay time of the input buffer and a delay time of the clock driver.

REFERENCES:
patent: 4524448 (1985-06-01), Hullwegen
patent: 4538119 (1985-08-01), Ashida
patent: 5245637 (1993-09-01), Gersbach et al.
patent: 5500627 (1996-03-01), Hulsing, II
patent: 5506878 (1996-04-01), Chiang
patent: 5554946 (1996-09-01), Curran et al.
T. Saeki et al., "SP 23.4: A 2.5ns Clock Access 250MHz 256Mb SDRAM with a Synchronous Mirror Delay", 1996 IEEE Int'l. Solid-State Circuits Conference, Session 23/DRAM/Paper SP23.4.

Affiliated with

Also associated with

Rating

Signal generator with synchronous mirror delay circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Signal generator with synchronous mirror delay circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Signal generator with synchronous mirror delay circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-83732