SOS Bipolar transistor

Details SOS Bipolar transistor SOS Bipolar transistor

1974-05-02

1976-03-09

Larkins, William D.

Metal treatment

Stock

Ferrous

148 15, 357 4, 357 35, 357 52, 357 56, 357 71, 357 91, H01L 2712, H01L 2972, H01L 2186, H01L 21265

Patent

active

039435555

ABSTRACT:
A planar bipolar transistor is made by the successive ion implantations of selected atoms into selected regions of a layer of doped single-crystal silicon on an insulating substrate, such as sapphire or spinel. The silicon layer is epitaxially grown, has a thickness of between 0.5 and 5 .mu.m, and is formed in two strata of different resistivities. A collector contact well is ion implanted into the upper stratum and annealed to diffuse it into the lower stratum of lower resistivity. The transistor is isolated, as a mesa, on the substrate; and an edge-guard region is ion implanted through the periphery of the mesa, except in the region of the emitter-base junction.

REFERENCES:
patent: 3383567 (1968-05-01), King et al.
patent: 3486892 (1969-12-01), Rosvold
patent: 3567508 (1971-03-01), Cox et al.
patent: 3602781 (1971-06-01), Hart
patent: 3660732 (1972-05-01), Allison
patent: 3666548 (1972-05-01), Brack et al.
patent: 3761319 (1973-09-01), Shannon
patent: 3890632 (1975-06-01), Ham et al.
Ronen et al., "Recent Advances in Thin-Film Silicon Devices on Sapphire Substrates," Proceedings of the IEEE, Vol. 59, pp. 1506-1510, Oct. 1971.
Fogiel, Modern Microelectronics (Research and Education Assn., N.Y., 1972) pp. 429-430.

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