Process for manufacturing semiconductor memory device and produc

Details Process for manufacturing semiconductor memory device and produc Process for manufacturing semiconductor memory device and produc

1987-12-09

1990-05-01

Hille, Rolf

357 41, 357 55, H01L 2978, H01L 2702, H01L 2906

Patent

active

049223135

ABSTRACT:
A dynamic RAM having a memory cell constituted by a capacitor element, utilizing a trench or moat formed in a semiconductor substrate, and a MISFET. One of the electrodes of the capacitor element is connected to the MISFET constituting part of the memory cell at the side wall of the upper end of the moat for forming the capacitor element. This electrode is connected in self alignment with a semiconductor region which serves as either the source or drain of the MISFET.

REFERENCES:
patent: 4786954 (1988-11-01), Morie et al.
Lu, N., "High-Capacitance Dynamic RAM Cell Using Buried Polysilicon Electrodes and Buried Oxide MOS Transistors", IBM Technical Disclosure Bulletin, vol. 26, No. 3B, Aug. 1983, pp.1318-1322.

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