Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Patent
1997-04-15
1998-10-06
Young, Brain K.
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
341143, H03M 166
Patent
active
058183779
ABSTRACT:
A bipolar, element averaging, digital to analog signal converter including a delta-sigma digital to analog converter (".increment..SIGMA. DAC") with dual sequence controllers for controlling the switching sequences of the array of sampling capacitors used to sample a fixed reference voltage in the sample and hold amplifier. The sequence controllers receive the input digital signal and a sign bit which indicates whether the numeric value of the digital signal is positive or negative with respect to the mean value of its total dynamic range. Based upon the sign bit and the value of the digital signal, the sequence controllers generate two sets of switching sequence control signals: "positive" and "negative." Those digital signals whose numeric values are positive and negative with respect to the mean value are considered to be "positive" and "negative" signals, respectively, with corresponding positive and negative analog signals generated accordingly. The same capacitors in the sampling array are used in rotating sequences for sampling the reference voltage for both "positive" and "negative" input digital signals. The "positive" and "negative" switching sequence control signal sets each ensure that each capacitor in the sampling array is used a substantially equal number of times when converting "positive" and "negative" input digital signals. Such a converter can be used in digital to analog converters as well as analog to digital converters which use delta-sigma signal conversion techniques.
REFERENCES:
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patent: 5748126 (1998-05-01), Ma et al.
Rex T. Baird and Terri S. Fiez, "Linearity Enhancement of Multibit .increment.E A/D and D/A Converters Using Data Weighted Averaging", IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 42, Dec. No. 12, 1995, pp. 753-762.
R. Schreier, "Mismatch -Shaping DAC ", Category: Circuit Design, Reporting Period Jun. 1, 1996-Dec. 31, 1996, Department of Electrical and Coumputer Engineering Oregon State University, pp. 1-4.
R. Schreier, "Mismatch-Shaping DAC", Viewgraphs, Reporting Period July 1, 1996-Dec 31, 1996, Department of Electrical and Computer Engineering Oregon State University, Views 1-20.
National Semiconductor Corporation
Young Brain K.
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