Patent
1990-11-07
1992-01-07
James, Andrew J.
357 236, 357 48, H01L 2702, H01L 2978, H01L 2704
Patent
active
050796135
ABSTRACT:
A semiconductor device comprises an N-type semiconductor substrate, a first P-type well formed in the semiconductor substrate, a second P-type well formed adjacent to the first P-type well in the semiconductor substrate, the surface impurity concentration of the second P-type well being set lower than that of the first P-type well, a DRAM memory cell structure formed in the first P-type well, and an MOS transistor structure formed in the second P-type well to function in combination with the memory cell structure.
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Fujii Syuso
Ogihara Masaki
Sawada Shizuo
James Andrew J.
Kabushiki Kaisha Toshiba
Meier Stephen D.
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