Vertical inverter

Details Vertical inverter Vertical inverter

1985-09-25

1988-04-26

Edlow, Martin H.

357 234, 357 236, 357 237, 357 41, 357 55, H01L 2978, H01L 2702, H01L 2906

Patent

active

047408260

ABSTRACT:
One embodiment of the present invention includes a vertical inverter. A layer of P-type material is formed on the surface of an N+-type substrate, followed by formation of an N+ layer, a P+ layer, an N- layer, and a P+ layer. (Of course different doping configurations may be used and remain within the scope of the invention). A trench is then etched along one side of the stack thus formed and a connector is formed to the middle P+ and N+ layers. Another trench is then formed where a gate insulator and a- gate are formed. The gate serves as the gate for both the N-channel and P-channel transistors thus formed.

REFERENCES:
patent: 3518509 (1970-06-01), Cullis
patent: 4462040 (1984-07-01), Ho et al.
patent: 4554570 (1985-11-01), Jastrzebski et al.
patent: 4566025 (1986-01-01), Jastrzebski et al.

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