Modified three transistor EEPROM cell

Details Modified three transistor EEPROM cell Modified three transistor EEPROM cell

1985-11-01

1987-12-22

Moffitt, James W.

Static information storage and retrieval

Floating gate

Particular biasing

365187, G11C 1140

Patent

active

047150149

ABSTRACT:
An electrically erasable programmable semiconductor memory cell having an associated conducting column line, read/write line, sense line and row line includes a floating gate transistor which controls the discharge of the read/write line to the column line during read cycles. During write cycles and precharging of said read/write line the column line is made electrically floating so that a faster precharge time and hence access time is obtained and so that access time is independent on the conducting state of the floating gate transistor resulting at commencement of a read cycle.

REFERENCES:
patent: 4300212 (1981-11-01), Simko

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