Method for the manufacture of cross-couplings between n-channel

Details Method for the manufacture of cross-couplings between n-channel Method for the manufacture of cross-couplings between n-channel

1986-06-16

1988-04-26

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 56, 437193, 437200, 437233, 357 42, 357 71, H01L 2265

Patent

active

047404795

ABSTRACT:
Cross-couplings between n-channel and p-channel CMOS field effect transistors of static write-read memories (SRAMs) with buried contacts to the n.sup.+ and p.sup.+ regions in the substrate are obtained in accordance with known method steps and with a high packing density. A gate level thereof formed of a polycide double layer is used as an additional wiring level for the cross-coupling. The formation of the gate level occurs after the opening of regions for the buried contacts. A doping occurs simultaneously with the generation of source/drain regions of the n-channel and p-channel transistors by masked ion implantation and a subsequent high-temperature treatment. Accordingly, simple, mask-non-intensive method steps result which are especially useful in the manufacture of 6-transistor SRAMs.

REFERENCES:
patent: 4246593 (1981-01-01), Bartlett
patent: 4282648 (1981-08-01), Yu et al.
patent: 4443930 (1984-04-01), Hwang et al.
patent: 4581815 (1986-04-01), Cheung et al.
patent: 4640844 (1987-02-01), Neppl et al.
IEDM 84-"A New Full CMOS SRAM Cell Structure", by O. Kudoh et al., NEC Corporation, Sagamihara, Kanagawa 229, Japan, pp. 67 to 70.
"Semiconductor Memory Design and Application", by Gerald Luecke et al., McGraw-Hill Kogakusha, Ltd., pp. 115-123.

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