Method of fabricating trench cell capacitors on a semocondcutor

Details Method of fabricating trench cell capacitors on a semocondcutor Method of fabricating trench cell capacitors on a semocondcutor

1988-05-10

1989-06-27

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 60, 437203, 437 89, 437919, 357 236, H01L 2172, H01L 21385

Patent

active

048430250

ABSTRACT:
This invention relates to a method of fabricating trench cell capacitors which comprises a step of forming a first trench having side walls and a bottom, the side walls are substantially vertical to a surface of a semiconductor substrate of one conductive type and forming an oxide layer on the side walls and bottom of said first trench, a step of forming a silicon nitride layer on the oxide layer of the side walls of said first trench, and removing the oxide layer on the bottom of said first trench by anisotropic etching using said silicon nitride layer as a mask, a step of removing said silicon nitride layer and growing an epitaxial layer of the same conductive type as said semiconductor substrate in said first trench to embed the first trench with this epitaxial layer, and a step of removing the oxide layer remaining on the side wall of said first trench to form a loop-shaped second trench. According to this fabricating method, a fine trench having a high aspect ratio can be accurately formed, and the degree of integration of semiconductor memory device can be enhanced. Unlike the conventional method of employing the anisotropic dry etching method, damage of the side wall of trench or sharp residual damage of the periphery of the bottom of trench does not occur.

REFERENCES:
patent: 4353086 (1982-10-01), Jaccodine et al.
patent: 4713678 (1987-12-01), Womack et al.
patent: 4728623 (1988-03-01), Lu et al.
patent: 4734384 (1988-03-01), Tsuchiya
patent: 4751558 (1988-06-01), Kenney
Shah et al., "A 4-Mbit DRAM with Trench-Transistor Cell." IEEE J. of Solid-State Circuits, vol. SC-2v, No. 5, Oct. 1986, pp. 618-626.

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