Method for fabricating semiconductor device

Metal working – Method of mechanical manufacture – Assembling or joining

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29571, 29580, 148187, 148188, H01L 21225

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044198132

ABSTRACT:
A method for forming an isolation region on a semiconductor substrate which comprises steps of forming first a groove in said substrate, filling the groove with a first insulating film in a manner which may inevitably leave a gap between the wall of the groove and the each side of the first insulating film, forming a second insulating film on the surface of said substrate including said groove, and removing a surface layer of said second insulating film thereby forming an isolation region in the groove filled completely with the first and second insulating films.

REFERENCES:
patent: 3352725 (1967-11-01), Antell
patent: 3966514 (1976-06-01), Feng et al.
patent: 3985597 (1976-10-01), Zielinski
patent: 4016017 (1977-04-01), Aboaf et al.
patent: 4222792 (1980-09-01), Lever et al.
patent: 4224089 (1980-09-01), Nishimoto et al.
patent: 4233091 (1980-11-01), Kawabe
patent: 4348802 (1982-09-01), Shirato
Patent Abstracts of Japan, vol. 2, No. 73, Jun. 7, 1978, p. 2847E78 for JP-A-53-39074.
Patent Abstracts of Japan, vol. 3, No. 22, Feb. 24, 1979, p. 35E93 for JP-A-54-589.
IBM Technical Disclosure Bulletin, vol. 21, No. 9, Feb. 1979, New York, Bhattacharyya et al., "Lift-Off Insulator Process," pp. 3577 and 3578.
IBM Technical Disclosure Bulletin, vol. 23, No. 3, Aug. 1980, New York, Horng et al., "Formation of Channel Stopper for Deep Trench Isolation", pp. 1034 and 1035.

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