Semiconductor device for executing fuzzy inference and method of

Details Semiconductor device for executing fuzzy inference and method of Semiconductor device for executing fuzzy inference and method of

1991-01-03

1994-03-29

Gossage, Glenn

Boots, shoes, and leggings

395 21, 395 61, 395425, 395900, 36471501, 36471506, 364DIG1, 365 49, G06G 700, G06F 1518, G11C 1504

Patent

active

052992837

ABSTRACT:
A device for executing fuzzy inference includes a first storage area constituting a condition portion of a fuzzy set and a second storage area constituting a conclusion portion of the fuzzy set. The first storage area stores membership functions of the condition portion in order to develop a first bit mapping while the second storage area stores membership functions of the conclusion portion in order to develop a second bit mapping. Each of the first and second storage areas has X addresses which are designated by an input signal and Y addresses which are designated by a membership value. The device further includes circuitry for detecting corresponding rows of the first and second storage areas on which signal potentials are both a logical true after application of input signals to the first and second storage areas, other circuitry for detecting a Y address specifying a highest-order row among the detected rows, and additional circuitry for deriving a membership value in accordance with the detected Y address. The first and second storage areas preferably each include an array of content addressable memory cells having X addresses applied by an input pattern. A row detecting circuit detects coincidence
on-coincidence of signal potentials on coincidence detection lines of the content addressable memory cell arrays. The construction realizes a device for executing a fuzzy inference which is not limited by the number of rules or inputs and executes MIN-MAX operations at a high speed.

REFERENCES:
patent: 4965767 (1990-10-01), Kinoshita et al.
patent: 4989256 (1991-01-01), Buckley
patent: 5126600 (1992-06-01), Zhang
patent: 5167005 (1992-11-01), Yamakawa
patent: 5179625 (1993-01-01), Hisano
Expert System on a Chip: An Engine for Real-time Approximate Reasoning; Togai et al; IEEE Expert; Fall 1986; pp. 55-62.
Nikkei Electronics No. 426, pp. 129-152, Jul. 27, 1987.
Nikkei Electronics No. 457, pp. 157-168, Oct. 3, 1988.

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