Digital transmitting system

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 84, 358146, H04J 312

Patent

active

044728034

ABSTRACT:
In a digital transmitting system wherein signal information is transmitted from a transmission buffer memory device to a receiving buffer memory device through a transmission line extending therebetween, there are provided a counter for producing count information proportional to a sum of information transmission delay times in the transmission and receiving buffer memory devices, and a read control circuit which controls the read-out time of the information from the receiving buffer memory device such that a count of the counter coincides with a predetermined reference value, thereby rendering a sum of the information transmission delay times coincident with a predetermined time.

REFERENCES:
patent: 4215369 (1980-07-01), Iijima
patent: 4392234 (1983-07-01), Maruta

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