Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements
Patent
1993-05-28
1994-06-07
Grimm, Siegfried H.
Oscillators
Automatic frequency stabilization using a phase or frequency...
Afc with logic elements
331 8, 331 14, 331 17, 331 25, H03L 7089, H03L 7093
Patent
active
053193202
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The invention generally relates to phase-locked loops that generate a clock synchronized in phase with an input signal and more particularly to improving phase-locked loops applicable to zone bit recording in hard disk systems, etc.
As shown in FIG. 4, prior art configurations widely used for phase-locked loops in data separators and frequency multiplier circuits for magnetic disk devices, etc., comprise, a phase comparator 10 which compares the phases of an input signal S.sub.IN, a reference signal, and an oscillator output V.sub.OUT (at oscillation frequency f.sub.OSC) of a voltage-controlled oscillator 40, and outputs first and second phase difference detection signals X.sub.1 and X.sub.2. A charge pump 20 supplies a charge/discharge current i (pulse output current) to a loop filter 30 capacitor C.sub.F which is based on the first and second phase difference detection signals X.sub.1 and X.sub.2. Loop filter 30 is a low pass filter (LPF) which is configured as a series circuit including resistor R.sub.F and capacitor C.sub.F, and voltage-controlled oscillator (VCO) 40 which generates oscillator output V.sub.OUT at oscillation frequency f.sub.OSC, which corresponds to a value for analog filter output voltage V.sub.F, which is used as a control input.
Voltage-controlled oscillator 40 generally comprises a voltage-current conversion circuit, which converts the control input voltage into a current, and a current-frequency conversion circuit which changes the frequency f.sub.OSC of oscillator output V.sub.OUT, according to the resulting output current. Oscillation frequency f.sub.OSC of voltage-controlled oscillator 40 may be input into phase comparator 10 using a prescribed divider. Phase comparator 10 is a digital phase comparator; e.g., configured from a pair of D-type flip-flops and a logic gate. Charge pump 20, as shown in FIG. 5, is a series circuit configured from a switching transistor 22 (p-type MOSFET) used for source current switching, which turns ON when first phase difference detection signal X.sub.1 is at a low level, a constant current source 24 used to generate source current; a switching transistor 26 (n-type MOSFET) used for sink current switching, which turns ON when second phase difference detection signal X.sub.2 is at a high level, and a constant current source 28 used to generate sink current.
When a phase difference occurs in oscillator output V.sub.OUT with respect to input signal S.sub.IN in a phase-locked loop having the above configuration, phase comparator 10 generates phase difference detection signals X.sub.1, X.sub.2. Charge pump 20 outputs source or sink current i using signals X.sub.1, X.sub.2, as shown in FIG. 6. Therefore, a voltage drop is generated across resistor R.sub.F of filter 30 and capacitor C.sub.F is charged and discharged by this pulse current. Since oscillation frequency f.sub.OSC of voltage-controlled oscillator 40 is varied by the value of the filter output voltage V.sub.F, the phase difference between oscillator output V.sub.OUT and input signal S.sub.IN becomes zero as time progresses.
During a time in which signals X.sub.1, X.sub.2 of each period are not generated, an integrated load is stored in capacitor C.sub.F, and, therefore, the output of voltage-controlled oscillator 40 is controlled by that charging voltage. Therefore, the charging voltage of capacitor C.sub.F for current i functions as a frequency control signal for the pull-in operation that matches oscillation frequency f.sub.OSC to the frequency of input signal S.sub.IN. The voltage drop in resistor R.sub.F for current i functions as a phase control signal for the lock-in operation since it controls the output phase of voltage-controlled oscillator 40, when error signals X.sub.1, X.sub.2 are generated.
Since this kind of phase-locked loop performs phase locking with respect to a specific input signal S.sub.IN which fluctuates within a narrow frequency range, the value of the electrical element of each circuit is optimized. These include, for example, the value of o
REFERENCES:
patent: 4167711 (1979-09-01), Smoot
patent: 4885552 (1989-12-01), Boudewijns
patent: 5021749 (1991-06-01), Kasai et al.
Abe Akira
Kawasaki Takeshi
Carothers, Jr. W. Douglas
Grimm Siegfried H.
Seiko Epson Corporation
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