Multiplier capable of calculating double precision, single preci

Details Multiplier capable of calculating double precision, single preci Multiplier capable of calculating double precision, single preci

1994-10-20

1996-05-28

Envall, Jr., Roy N.

Boots, shoes, and leggings

364758, G06F 752

Patent

active

055218563

ABSTRACT:
An AND gate inputs the most significant bit of a lower word of an multiplicand or "0" to an input terminal of the least significant bit of Booth's decoders to which an upper word of the multiplicand is inputted based on a control signal. An AND gate replaces a part of a partial products with "0" based on the control signal. A selector replaces other part of the partial products with partial products of the lower bits than the other part of the partial products. Whereby, a plurality of pairs of data can be multiplied at one time.

REFERENCES:
patent: 4680727 (1987-07-01), White
patent: 4813008 (1989-03-01), Shigehara et al.
patent: 4879677 (1989-11-01), Shiraishi
patent: 5262976 (1993-11-01), Young et al.
patent: 5420809 (1995-05-01), Read et al.
Patent Abstracts of Japan, vol. 16, No. 506, Oct. 20, 1992.

Affiliated with

Also associated with

Rating

Multiplier capable of calculating double precision, single preci does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiplier capable of calculating double precision, single preci, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiplier capable of calculating double precision, single preci will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-792347