Interface circuit for data transmission between a microprocessor

Details Interface circuit for data transmission between a microprocessor Interface circuit for data transmission between a microprocessor

1989-06-22

1991-06-11

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

3701001, H04J 306

Patent

active

050238701

ABSTRACT:
The circuit of the present invention provides a signal which allows data to be transferred between a first synchronous system to a second synchronous system. Where the first synchronous system is a Time-Division-Multiplexing (TDM) system and the second synchronous system is a Microprocessor system. The transfer is allowed at the end of the assigned time slot provided that the microprocessor is not accessing the data. If the microprocessor is accessing the data, then the transfer is delayed for three clock cycles of the TDM clock. After the delay, if the microprocessor is still accessing the data, the transfer is delayed again. The delaying continues until the microprocessor is no longer accessing the data, at which time the transfer is allowed.

REFERENCES:
patent: 4910507 (1990-03-01), Shimizu et al.

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