Fishing – trapping – and vermin destroying
Patent
1994-10-28
1996-05-28
Fourson, George
Fishing, trapping, and vermin destroying
437226, H01L 2178
Patent
active
055211259
ABSTRACT:
A wafer design and dicing technique for creating semiconductor chips from wafers. A succession of oxide layers are deposited in first and second regions of a surface of a silicon substrate. The regions are separated by a street having no oxide layers therein, and the successive oxide layers form a vertical wall with a surface normal to the surface of the silicon substrate. A shock-absorbent material is deposited in the street, forming a concave meniscus therein. The shock-absorbent material retards the trajectories of silicon particles set into motion when the wafer is diced into chips.
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Jedlicka Josef E.
Ormond Brian T.
Fourson George
Hutter R.
Mulpuri S.
Xerox Corporation
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