Process of fabricating memory cell with a switching transistor a

Details Process of fabricating memory cell with a switching transistor a Process of fabricating memory cell with a switching transistor a

1994-05-06

1996-05-28

Tsai, H. Jey

Fishing, trapping, and vermin destroying

437 47, 437 60, 437919, H01L 2170, H01L 2700

Patent

active

055211119

ABSTRACT:
A memory cell is implemented by a series combination of a field effect transistor and a trench-stacked type storage capacitor, and an accumulating electrode is held in contact with a source region of the field effect transistor through an extremely narrow gap between a side spacer on a gate electrode of the field effect transistor and an isolation layer extending along a primary trench nested with the source region, wherein the side spacer is formed from a deposited doped polysilicon film and the isolation layer is formed by thermally oxidizing a wall portion of the primary trench so that the extremely narrow gap is defined without lithographic techniques.

REFERENCES:
patent: 5027172 (1991-06-01), Jeon
patent: 5334547 (1994-08-01), Nakamura

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