Fishing – trapping – and vermin destroying
Patent
1993-09-15
1996-05-28
Fourson, George
Fishing, trapping, and vermin destroying
437196, 437234, 437977, 148DIG59, H01L 218247
Patent
active
055211089
ABSTRACT:
A conductive member is described with a surface of controlled roughness thereon which is useful in the construction of an integrated circuit structure. In a preferred embodiment, the conductive member is formed using a mixture of germanium and silicon which is then oxidized, resulting in the formation of a roughened surface on the germanium/silicon conductive member due to the difference in the respective rates of oxidation of the germanium and silicon. After oxidation of the conductive member, the oxide layer may be removed, leaving the roughened surface on the germanium/silicon conductive member. When an integrated circuit structure such as an EPROM is to be formed using this conductive member with a roughened surface, a further layer of oxide is then deposited over the roughened surface followed by deposition of a second layer of conductive material such as polysilicon or a germanium/silicon mixture, from which the control gate will be formed. A further oxide layer may then be formed over the second conductive layer followed by a patterning step to respectively form the floating gate (from the germanium/silicon layer) and the control gate from the second conductive layer.
REFERENCES:
patent: 4442449 (1984-04-01), Lehrer et al.
patent: 4735919 (1988-04-01), Faraone
patent: 4757360 (1988-07-01), Faraone et al.
patent: 4948750 (1990-08-01), Kausche et al.
patent: 4957777 (1990-09-01), Ilderem et al.
patent: 4975387 (1990-12-01), Prokes et al.
patent: 5017505 (1991-05-01), Fujii et al.
patent: 5081066 (1992-01-01), Kim
patent: 5087583 (1992-02-01), Hazani
patent: 5110752 (1992-05-01), Lu
patent: 5182232 (1993-01-01), Chhabra et al.
patent: 5223081 (1993-06-01), Doan
patent: 5238855 (1993-08-01), Gill
patent: 5241193 (1993-08-01), Pfiester et al.
patent: 5312766 (1994-05-01), Aronowitz et al.
Wolf, "Silicon Processing for the VLSI Era", vol. 1, pp. 303-308, 1986.
Liu et al., "Instability of a Ge.sub.x Si.sub.1-x O.sub.2 film on a Ge.sub.x Si.sub.1-x layer", Journal of Applied Physics, Nov. 1992, vol. 72, No. 9, pp. 4444-4446.
Kapoor Ashok
Rostoker Michael D.
Booth Richard A.
Fourson George
LSI Logic Corporation
Taylor John P.
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