Patent
1995-02-10
1997-06-10
Harrell, Robert B.
G06F 930
Patent
active
056385250
ABSTRACT:
A data processor is described. The data processor is capable of decoding and executing the first instruction of a first instruction set and the second instruction of a second instruction set wherein the first instruction and the second instruction originate from a single computer program. Alternatively, the data processor can also execute a first instruction of a first instruction set in a first instruction set mode, receive a first interruption indication in the first instruction set mode, service the first interruption indication in a second instruction set mode, return to the first instruction set mode, receive a second interruption indication in the first instruction set mode, and service the second interruption indication in the first instruction set mode.
REFERENCES:
patent: 4839797 (1989-06-01), Katori et al.
patent: 5481684 (1996-01-01), Richter et al.
Alpert Donald B.
Hammond Gary N.
Kahn Kevin C.
Harrell Robert B.
Intel Corporation
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