Turn-on/off driving technique for insulated gate thyristor

Details Turn-on/off driving technique for insulated gate thyristor Turn-on/off driving technique for insulated gate thyristor

1989-07-31

1992-09-01

Jackson, Jr., Jerome

357 37, 357234, H01L 2974

Patent

active

051444011

ABSTRACT:
A thyristor is disclosed which has a laminated structure of a first emitter layer of n.sup.+ conductivity type, a first base layer of p type, a second base layer of p.sup.- type, a second emitter layer of n type, and a second emitter layer of p.sup.+ type. The first base layer has a first exposed surface portion which is in lateral contact with the first emitter layer, and a second exposed surface portion which is in lateral contact with the second base layer. The second surface portion defines a layer portion of the second base layer which is positioned between the first base layer and the second emitter layer. An anode electrode is connected to said second emitter layer, whereas a cathode electrode is connected to the second base layer and the first emitter layer. A first gate electrode is formed on the first surface portion of the first base layer. A second gate electrode is insulatively disposed above the second surface portion of the first base layer to form a MOSFET together with the first base layer and the second emitter layer. The layer portion of the second base layer serves as a channel region of the MOSFET.

REFERENCES:
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patent: 4635086 (1987-01-01), Miwa et al.
patent: 4680604 (1987-07-01), Nakagawa et al.
patent: 4760431 (1988-07-01), Nakagawa et al.
patent: 4782379 (1988-11-01), Baliga
patent: 4816892 (1989-03-01), Temple
patent: 4881120 (1989-11-01), Nakagawa et al.

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