Programmable controller having a means to accept a plurality of

Details Programmable controller having a means to accept a plurality of Programmable controller having a means to accept a plurality of

1993-07-19

1995-07-04

Harvey, Jack B.

Boots, shoes, and leggings

395325, 395275, 364DIG1, 364230, 3642301, 3642302, 364235, 3642383, 364240, 3642412, 3642413, 3642419, 3642626, G06F 900, G06F 1310

Patent

active

054308798

ABSTRACT:
Data lines constituting a data bus for connecting a plurality of parallel I/O devices are assigned in a one-to-one correspondence with the I/O devices. Each I/O device outputs an interrupt request to a CPU through an interrupt request line. In response to an interrupt enable signal from the CPU, each I/O device supplies information indicating its mounting position to an interface circuit as interrupt data through a data line of the data bus assigned to itself. The interface circuit has a latch circuit for latching interrupt data from the plurality of I/O devices, a circuit for setting the priority of interrupt data latched by the latch circuit, and a circuit for generating an interrupt vector on the basis of interrupt data having the highest priority in accordance with the set priority order.

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