Memory system for processing digital video signal

Static information storage and retrieval – Addressing

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Details

36523006, 36523008, 36518901, 36518912, 365222, G11C 700

Patent

active

054306841

ABSTRACT:
A memory system for processing digital video signals.
The memory system comprise a RBA control means for controlling a RBA using signals applied from the outside, an address generation means for generating an address using an initial address in accordance with the control of the RBA control means, a memory cell array for storing data in accordance with the control of the RBA control means and the address generation means, a transmission control means for controlling the transmission of data from the memory cell array in accordance with the control of the RBA control means and the address generation means and an input and output means for prosecuting the input and output of data in accordance with the control of the RBA control means and the transmission control means.

REFERENCES:
patent: 5202857 (1993-04-01), Yanai et al.
patent: 5287485 (1994-02-01), Umina et al.
Paper Entitled "Choosing Image Compression Chips for Multimedia" Published in the Electronics Engineer in Dec. 1992.

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