Integrated circuit with a low-power mode and clock amplifier cir

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

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Details

327281, 327291, 327437, H03K 17687

Patent

active

054303931

ABSTRACT:
An integrated circuit (40) has a low-power mode in which at least one switched inverter stage (60) of a clock amplifier (41) is disabled in response to a stop signal. The stop signal indicates that the integrated circuit (40) is in low-power mode. In one embodiment, each switched inverter stage is a complementary metal-oxide-semiconductor (CMOS) switched inverter (60), in which an additional P-channel transistor (61) is connected between the source of an inverter P-channel transistor (62) and a positive power supply voltage terminal, and in which an additional N-channel transistor (64) is connected between a source of an inverter N-channel transistor (63) and a negative power supply voltage terminal. A non-switched inverter stage (52) remains active during low-power mode to maintain a DC value of a clock input signal near a switchpoint of the clock amplifier (41).

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Millman, Jacob and Halkias, Christos C., "Integrated Electronics", McGraw Hill, Inc., New York, 1972, pp. 542-543.

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