Process for simultaneously fabricating a bipolar transistor and

Details Process for simultaneously fabricating a bipolar transistor and Process for simultaneously fabricating a bipolar transistor and

1993-07-09

1995-07-04

Thomas, Tom

Fishing, trapping, and vermin destroying

437 31, 437 59, 148DIG9, H01L 21265

Patent

active

054299594

ABSTRACT:
A bipolar transistor (408) is formed at a face of a semiconductor layer (152) of a first conductivity type. A first tank region (410) is formed in the semiconductor layer to be of a second conductivity type. A second tank region (412) is formed in the self-conductor layer to be of the first conductivity type and to be formed within the first tank region (410). At least one moat insulator region (210) is selectively grown on the face, with first, second, third, and fourth portions thereof being spaced apart. The first and second portions of the moat insulator region (210) self-align the implantation of a collector contact region. The second and third portions of the moat insulator region (210) self-align the implantation of an emitter. The third and fourth portions of the moat insulator region (210) self-align the implantation of a base contact region.

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