Charge coupled device feedback analog-to-digital converter using

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307221D, 340347M, 357 24, H03K 1302

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active

043296793

ABSTRACT:
An analog-to-digital converter includes a charge coupled device comparator receiving an analog signal which is to be converted to an eight bit binary word. An eight bit charge coupled device shift register addresses an eight bit digital-to-analog converter through eight separate resettable latches to generate a reference signal which is compared in successive approximations to the analog signal by the charge coupled device comparator to generate each binary bit of the eight bit word. Sensitivity of the charge coupled device comparator is enhanced by the use of charge coupled regenerative feedback to generate each binary bit of the eight bit binary word, which is read serially into an output register. The charge coupled device comparator decides whether each bit of the eight bit binary word is to be a logic one or a logic zero by comparing the analog input signal with reference signals selected in successive approximations by a shift register addressing the digital-to-analog converter. The analog signal is compared with a progressively increasing reference signal whose magnitude is increased by successively smaller increments. Eight such successive approximations and comparisons are made in order to generate the eight bit binary word.

REFERENCES:
patent: 3930255 (1975-12-01), Means
patent: 4058717 (1977-11-01), Engeler
patent: 4072938 (1978-02-01), Buchanan
patent: 4092549 (1978-05-01), Prince
patent: 4107670 (1978-08-01), Hornak
patent: 4126852 (1978-11-01), Baertsch
patent: 4171521 (1979-10-01), Wang et al.
The Engineering Staff of Analog Devices, Inc., Analog-Digital Conversion Handbook, 6/1972, pp. II-80 & 81.

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