Fishing – trapping – and vermin destroying
Patent
1993-04-09
1995-01-17
Thomas, Tom
Fishing, trapping, and vermin destroying
H01L 21324, H01L 21477
Patent
active
053825519
ABSTRACT:
A method is disclosed for reducing the effects of semiconductor deformities. Initially, a semiconductor substrate is provided. The substrate has at least one layer superjacent the substrate and at least one layer subjacent the substrate. Subsequently, the semiconductor structure is examined for warp and bow type deformities. As a result of this examination, the warp and bow measurements of the semiconductor structure are compared with a reference. In the event that the measured warp and bow exceed a predetermined tolerance, either the thickness of the layer superjacent or the thickness of the layer subjacent is reduced. This reducing step can be accomplished by chemical and/or mechanical planarization, dry etching, wet etching or plasma etching.
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Martin Annette L.
Thakur Randhir P. S.
Gurley Lynne A.
Micron Semiconductor Inc.
Pappas Lia M.
Thomas Tom
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